[H-GEN] CHIP SPEED

[Frank Brand]

mtippett wrote:
> 

> 
> Another reason that the PII might be considerably faster (apart from
> straight CPU grunt is that the L2 cache is effectively wired into
> the CPU.  It would be interesting to see what sort of times a PPro
> of similar clock speed would give, it too has a 'wired in' cache.


  I am sure the Intel engineers did
> wire the L2 cache for speed in the PII (and PPro).
> 
> But then again, ask we could talk about the accuracy of benchmarks,
> like iComp..


Yes, I agree the importance of the cache, the PPro is often faster in
tasks than a P(II) with faster speed because in the PPro the cache is
significantly larger. In building the PPro the associated cache circuit
caused a lower yield (significantly there has been no further
development of the PPro for some time, with all Intel effort being
directed to the P(II)). So to increase yield for the P(II) the cache was
reduced (much like brining out the 486-SX to utilise all those 486 chips
with faulty FPU's). In a drive to capture the super-economy market in
the US, Intel will be bringing out a cacheless P(II) 266 MHz chip (in
April I believe) and will be boosting the P(II) to near 500MHz by
year-end.
-- 
Frank Brand
E-mail: fbrand at uq.net.au
Homepage: http://www.uq.net.au/~zzfbrand
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