[H-GEN] CHIP SPEED

[mtippett]

> 
> On Thu, 12 Feb 1998, BRAND, Frank wrote:
> 
> > 	Pentium 166 (64 MB memory)  	7 min 15 sec
> > 	AMD K6-166 (64 MB memory)	6 min 12 sec
> > 	Pentium II 300 (96 MB memory)	2 min  43 sec
> note that the pII, with the best time, has the most memory.  For a kernel
> compile, the processor is actually in use for a very small percent of the
> time.  *THE* most important factor is memory.  When you do a kernel
> compile, it grinds your HD away .. the more memory you have, the less it
> has to do so.  A fast HD, a caching controller, etc will also improve
> times.  A better processor, in general, will not.

I would agree up to a point.

At work I have 64M of memory.  When ever I do a kernel compile I never
hear the disk swap.  The only disk activity is typically an occasional
disk access to load the next file to compile.

Each compile will only take a certian amount of memory.  gcc and friends
will not expand to fill the memory, they will only use what they need,
which in a hand-wavy, unscientific way I feel would be about 32-48 MB.
You would probably find that the rest of the memory would be gobbled
up by the disk cache.  This means that gcc and most of the files would 
be sitting in the cache.  Do a free during a compile to confirm this.

As other people have indicated using -j3 or -j2 would probably help
since the you will have more processes running at the same time.

Another reason that the PII might be considerably faster (apart from
straight CPU grunt is that the L2 cache is effectively wired into
the CPU.  It would be interesting to see what sort of times a PPro
of similar clock speed would give, it too has a 'wired in' cache.

The cache gives the machine the biggest boost.  If any one still
has an antiquated 486 (like me) drop it into non-turbo mode.  It will
run like a dog.  On a 486 the CPU speed doesn't change, just the 
cache gets turned off.  That is where the biggest 'apparent' performance jumps
have been made, apart from clock speed.  In more advanced architectures the
pipe-lining, etc would help too.  I am sure the Intel engineers did
wire the L2 cache for speed in the PII (and PPro).

But then again, ask we could talk about the accuracy of benchmarks,
like iComp...

Cheers,

Matt
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