[H-GEN] Compaq Proliant

[Ewan Edwards]

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On Monday 28 July 2003 01:29 pm, Robert Brockway wrote:

>
> > [1] The RISC vs CISC processor[2] design path has been interesting to
> > watch. It's only now MIPS and SPARC are starting to cotton onto the
> > fact that people do infact want faster clockrates, and throughput
>
> The question is, is this coming from techs or management?  A SPARC
> cpu provides a lot more grunt per clock cycle but the lower cpu clock
> speed looks terrible on a glossy brochure.

The pretty clear answer here is that the main push comes from those who are 
not technically astute but 'well educated' by marketing materials.  These 
marketing materials are usually designed to highlight 'snazzy new features' 
rather than the facts. 

As most of us are all too well aware, it is not necessarily the technically 
better product that wins in the market place, it is usually the product that 
is marketed better.  Recall VHS vs BETA, and Windows vs Irix, or Solaris, or 
HPUX.  What about MSDOS vs CPM?  I'm sure others on this list could cite 
quite a few more.

In the past, I've shown a dual 187MHz SPARC box running Solaris 2.5 out 
performing a 500MHz PIII box running Windows 2000.  I've also shown a quad 
225MHz MIPS box running Irix out performing a dual 2.2GHz P4 Xeon running 
Windows 2000.

Please note that these incidents were not any kind of formalised or fair 
benchmark test, they were merely running the "the job ... intended [for] the 
box" on different boxes.

A person I know talks about the speed difference between CPUs in terms of an 
adult and a child walking together.  For a child to walk with an adult, the 
child needs step at a faster rate (clock speed) than the adult, simply 
because the adult step is longer (higher throughput) than the child's step.



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